Example embodiments relate to memory devices, and more particularly to memory systems including semiconductor memory devices and memory controllers.
A volatile memory device such as a dynamic random access memory (DRAM) needs to perform a refresh operation to retain stored data. For the refresh operation, a memory controller periodically provides the memory device with a refresh command in a normal access mode to refresh the memory device, and the memory device internally performs a refresh operation in a self-refresh interval in which a power consumption is low. Specifically, in an auto-refresh mode, a refresh is executed in response to an external refresh command that is supplied from outside the memory device. The auto-refresh mode may be performed between read and write operations. On the other hand, in the self-refresh mode, a refresh is executed in response to an internal refresh command that is automatically generated by the DRAM device. The self-refresh mode may be executed when the DRAM is in a powered-down state.
When the memory controller issues a self-refresh command frequently, the power consumption may increase.